发明名称 ADDRESS GENERATION CIRCUIT
摘要 <p>PURPOSE:To construct a circuit with a small amount of hardware which can designate an address only by specifying the distance between a bank number and a base pointer even when the address is constructed by plural loop areas. CONSTITUTION:The address generation circuit is provided with a latch circuit 101 latching base point values, an adder 102 where the output of the latch circuit 101 is supplied, a data holding circuit 106 outputting loop width information corresponding to loop area specification information designated corresponding to the loop area specification information, an adder 104 where the output of the data holding circuit 106 is entered in calculation input and the output of the adder 102 is inputted to the input to be calculated, a data holding circuit 107 holding loop area information, a coincidence detection circuit 108 comparing the above-mentioned loop area designation information with the output of the above-mentioned data holding circuit 107 to detect the coincidence of the both output, a selection circuit 109 selecting one of the output of the adders 102 and 104 according to the detection result of the coincidence detection circuit 108, and a latch circuit 110 latching the output of the selection circuit 109.</p>
申请公布号 JPH04230545(A) 申请公布日期 1992.08.19
申请号 JP19900417198 申请日期 1990.12.29
申请人 NEC CORP 发明人 NAKAMOTO TAKASHI
分类号 G06F12/02;G06F1/03;G06F5/06;G06F9/355 主分类号 G06F12/02
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