发明名称 BIT INVERSION COMPUTING ELEMENT
摘要 PURPOSE:To realize a bit inversion operation function by using simple and small amount of hardware. CONSTITUTION:Carry propagation control signals 121 and 122 are generated by a control circuit 117, and carry generation logic is executed by logic gates 109 and 110. In bit inversion operation, output co1 is driven by MOS transistors 111 and 113, and the carry propagation control is performed by a transfer gate 115. Sum signals to be generated by an EOR circuit 119 is entered into a selector circuit 120. In normal operation, output co2 is driven by MOS transistors 112 and 114, and the carry propagation control is performed by a transfer gate 116. Sum signals to be generated by an EOR circuit 118 is entered into a selector circuit 120. The selector circuit 120 selects either of the sum signals for bit inversion calculation or for normal operation.
申请公布号 JPH04230521(A) 申请公布日期 1992.08.19
申请号 JP19900417201 申请日期 1990.12.29
申请人 NEC CORP 发明人 YOSHIDA MAKOTO
分类号 G06F7/501;G06F7/50;G06F7/503;G06F7/506;G06F7/575 主分类号 G06F7/501
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