发明名称 |
METHOD FOR FORMING TIMING TEST PROGRAM |
摘要 |
PURPOSE: To conduct such regulation of timing of a test pattern as to depend on an internal state of a device, on the basis of an information output from a simulator not including the information regarding the timing and the internal state of the device, in a method of executing an IC device test related with a timing operation. CONSTITUTION: A test machine description regarding a state of timing of a device is led out from a device timing diagram and each test pattern is analyzed in correlation with the test machine description. Time set labels are attached to some combinations of pins and a waveform to be impressed in a test is determined. |
申请公布号 |
JPH04230876(A) |
申请公布日期 |
1992.08.19 |
申请号 |
JP19910125623 |
申请日期 |
1991.03.08 |
申请人 |
TEXAS INSTR INC <TI> |
发明人 |
JIYON AARU RAAKIN;RINGU JIEE FUITSUTOMOA;JIYON BII ARUKUISUTO |
分类号 |
G01R31/3183;G01R31/28;G06F11/22;G06F11/25;G06F11/26;G06F17/50 |
主分类号 |
G01R31/3183 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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