| 摘要 |
An offset voltage at one pair of differential amplifier transistors for effecting the differential amplification of an input signal is suppressed. To achieve this aim, the base current of a pair of differential amplifier transistors is supplied from a current generator circuit separately provided. This current generator circuit has a very small current flow, and is composed of another pair of differential amplifier transistors to which a reference voltage identical with the bias voltage of the first differential amplifier transistors is applied, a transistor for reference current use for delivering a current at a current density identical with the current density of the first differential amplifier transistors, a base current supply transistor for supplying power to the reference current transistor, and two current supply transistors for delivering a current identical with the current of the simulation base-current supply transistor. The transistors of the second differential amplifier act to make the base potential of the transistor for operation simulation use identical with a reference voltage, and then the simulation base current supply transistor supplies the base current to the operation simulation transistor. Thereafter, since the transistor for base current supply use delivers an identical current to the base current from the simulation base current supply transistor, the occurrence of the offset voltage in the differential amplifier transistors can be suppressed.
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