发明名称 |
COLUMN CORRECTION CIRCUIT FOR INTEGRATED CIRCUIT |
摘要 |
PURPOSE: To provide a column repair circuit of a byte wide static RAM outputting a signal to a decoder through eight I/O pads without using a fuse by simultaneously selecting eight bit lines by means of an address. CONSTITUTION: This repair circuit is composed of an input/output selecting means, for selecting a bit line and a bit line complied with a malfunctioned address by inputting of a control signal (ϕREDY) and substituting an auxiliary bit line and an auxiliary bit line, and a decoder means, for transferring the information of the bit line and the bit line selected by inputting outputs SI01-SI08 of the input/output selecting means and addresses y0-y15 to a data bit line and a data bit line.
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申请公布号 |
JPH04228185(A) |
申请公布日期 |
1992.08.18 |
申请号 |
JP19910112897 |
申请日期 |
1991.05.17 |
申请人 |
GENDAI DENSHI SANGIYOU KK |
发明人 |
JIYON SEUKU RII;SEUN MIN KIMU;JIYAE HIEON KIMU;SAN HOO RII |
分类号 |
G11C11/413;G11C29/00;G11C29/04 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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