发明名称 Adder circuit apparatus
摘要 An adder circuit includes a Manchester-carry-chain circuit which propagates a carry signal for each block consisting of plural bits, and a carry-look-ahead circuit which selects said carry signal in response to a carry propagation signal being generated by a full adder, and when the carry signal is not generated in the two consecutive blocks, an output from the Manchester-carry-chain circuit is selected by the carry-look-ahead circuit, so that the carry signal being inputted to the low-order block of the two blocks can be propagated as the carry signal to be outputted from the high-order block.
申请公布号 US5140546(A) 申请公布日期 1992.08.18
申请号 US19900531713 申请日期 1990.05.31
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 ISHIKAWA, KAZUYUKI;SHIMAZU, YUKIHIKO;FUJIYAMA, TOSHIKI
分类号 G06F7/50;G06F7/506;G06F7/508 主分类号 G06F7/50
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