| 摘要 |
<p>PURPOSE:To execute a fast quantizing arithmetic operation with a small circuit scale by providing an encoding data processor equipped with a quantization means which substitutes difinite number of levels for a signal changing successively. CONSTITUTION:Since data is inputted from an LSB, one time unit delay means left shift. In such a case, a binary point is neglected, and output by one time unit delay is reduced to 1/512, therefore, the input of a full-adder 32 shown in 3 is 1/256 and 1/512. and it follows that the one time unit delay occurs in the adder 32, and the output goes to (1/128+1/256). The output of 4 goes to (1/64+1/128+1/256) and that of 5 to (1/32+1/64+1/128+1/256) by repeating a similar operation, thereby, an expected value can be obtained. A quantizing arithmetic operation by a quantization table is realized by a serial circuit, which enables the circuit scale of the whole quantizer to be remarkably reduced.</p> |
