发明名称 MANUFACTURE OF LOW DEFECT POLYSILICON INTEGRATED CIRCUIT
摘要 PURPOSE: To provide an interface, not comprising natural oxide and other contaminants by selectively etching a wafer in anhydrous etching liquid, and depositing polysilicon over it. CONSTITUTION: A polysilicon layer 2 is deposited on a silicon wafer 1. However, with exposed silicon making contact with oxygen, a natural oxide is instantaneously formed on the wafer 1, and in addition, other contaminants stick to an exposed silicon surface to form a layer 4 of natural oxide and other contaminants. To remove the layer 4, insist etching is performed with the exposed silicon in an anhydrous etching liquid prior to and at the same time as polysilicon deposition on the silicon wafer 1. Thereby, the layer 4 is completely removed, for obtaining an interface not containing natural oxide and other contaminants.
申请公布号 JPH04226017(A) 申请公布日期 1992.08.14
申请号 JP19910105144 申请日期 1991.04.11
申请人 AMERICAN TELEPH & TELEGR CO <ATT> 发明人 ANATORII FUEIGENSON;CHIYANNKUEI FUAN
分类号 H01L21/205;H01L21/285;H01L21/302;H01L21/304;H01L21/306;H01L21/3065;H01L21/311;H01L21/321 主分类号 H01L21/205
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