发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To recover the memory cell which is in a depression state to a normal state since in EEPROM using floating gate type transistor as the memory cell the memory cell becomes a depression state when for example the erased time is too longer. CONSTITUTION:A depression correcting circuit 72 detects whether or not there exists the memory cell MC which is in the depression state among the memory cell arrays MCA based on the read-out data being sent by a sense amplifier 16. When the depression correcting circuit 72 detects the memory MC being in the depression state, the tunnel writing is conducted with respect to all memory cells included in the memory cell arrays MCA. Hence electron is injected in the floating gate of the memory transistor composing the memory cell and the memory transistor becomes the enhance from the depression.</p>
申请公布号 JPH04222994(A) 申请公布日期 1992.08.12
申请号 JP19900406902 申请日期 1990.12.26
申请人 MITSUBISHI ELECTRIC CORP 发明人 HAYASHIGOE MASANORI;TERADA YASUSHI;NAKAYAMA TAKESHI;MIYAWAKI YOSHIKAZU;KOBAYASHI SHINICHI
分类号 G11C17/00;G11C16/02;G11C16/06;G11C16/34 主分类号 G11C17/00
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