Fault monitoring circuit.

摘要

A fault monitoring circuit is arranged to continuously monitor signals IP(0) to IP(N) from a number of different signal sources. A modulo-2 adder (3) combines the signals from the sources to produce a signal which is used by a linear feedback shift register to produce a signature indicative of those sequences within the signals from successive time intervals, so as to provide an indication of any faults in the signals IP(0) to IP(N).