发明名称 Blocking message transmission or signaling error in response to message addresses in a computer interconnect coupler for clusters of data processing devices
摘要 A computer interconnect coupler has channel transmitters and channel receivers and logic circuitry for the routing of messages from the channel receivers which are addressed to the channel transmitters. When a message is received by a channel receiver, the channel receiver stores the beginning portion of the message in a first-in-first-out buffer, and sends a route message request to central switch logic. If the destination transmitter or receiver is busy, the central logic places the message request on a destination queue and returns a signal to the requesting source transmitter to turn on a flow control signal which is transmitted back to the data processing device having originated the message. Any message addressed to this data processing device, however, is inserted into the flow control carrier with pauses both before and after the message, and provisions are also made to allow the data processing device to return an acknowledgment responsive to the incoming message. To permit incremental expansion of the coupler to accommodate an increased number of channels, additional channel interface boards may be added. The coupler also includes a plurality of timers which determine fault conditions, and a diagnostic processor monitors the timers and associated error flags to diagnose faults to the board level. The conditions existing at the time of fault diagnosis are written into a non-volatile memory located on the circuit board. Therefore, the information is physically carried along with the board to the repair facility.
申请公布号 US5138611(A) 申请公布日期 1992.08.11
申请号 US19910744829 申请日期 1991.08.12
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 CARN, RONALD C.;METZ, DONALD R.;ZAGAME, STEVEN P.;KIRK, ROBERT C.;KENT, ALLAN R.;READ, HAROLD A.;HENRY, BARRY A.;KACZOR, CHARLES E.;MILLS, MILTON V.
分类号 G06F15/16;G06F11/20;G06F11/22;G06F13/40;G06F15/17 主分类号 G06F15/16
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