| 摘要 |
<p>PURPOSE:To reduce jitter of a sampling block by inhibiting the phase control when an evaluation function is within a prescribed value. CONSTITUTION:When an output of an evaluation function arithmetic section 20 receiving a sample fk-1 of a reception signal by a discrimination feedback equalizing circuit and a discrimination value ak is within a range of reference values (threshold levels) hth1, fth2, a comparator 30 does not implement phase control. That is, when the output of the arithmetic section 20 is within the reference value, a frequency division ratio of a frequency divider 22 is not changed. Thus, in the case of sampling at a phase close to a convergent phase, no phase control is implemented to reduce jitter of a sampling block.</p> |
