| 摘要 |
PURPOSE: To functionally conduct a test on cache tag RAM in a processor system where the access of a kernel is impossible. CONSTITUTION: An error is judged to exist or not in cache tag RAM 22. When on error exists, the patterns of '1' and '0' are sequentially supplied until a bit pattern which actually exists in an erroneous tag RAM location is obtained, and the erroneous RAM location is tested. The obtained bit pattern is compared with an expected bit pattern. Thus, information on the precise location of the error is obtained so that a defective chip can be exchanged. |
