发明名称 |
VERIFICATION METHOD OF PROCESS PATTERN |
摘要 |
<p>PURPOSE:To enhance the verification accuracy of the title pattern and to shorten the verification time of the pattern. CONSTITUTION:When a process pattern formed in a peripheral region other than a device region is verified, said peripheral region is cut off partially and the pattern in said cut-off region is extracted. The extracted pattern is compared with various kinds of process patterns which have been held in advance inside a library.</p> |
申请公布号 |
JPH04219951(A) |
申请公布日期 |
1992.08.11 |
申请号 |
JP19900404407 |
申请日期 |
1990.12.20 |
申请人 |
FUJITSU LTD |
发明人 |
HASHIMOTO HIROSHI;SAKURAI MITSUO;OKADA TOMOYUKI |
分类号 |
G03F1/38;H01L21/027;H01L21/30;H01L21/66 |
主分类号 |
G03F1/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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