发明名称 TIME DIVISION MULTIPLEX PROCESSOR
摘要 PURPOSE:To enable the folding of the station itself, by providing a buffer and an address generator at the transmission and reception sides, and supplying the signal corresponding to the address to a time division echo suppressing functional block. CONSTITUTION:The transmission and reception signals corresponding to the same addresses are fed to a time division echo block functional block 105 from buffer circuits 103, 104 of transmission and reception sides at the same time zone from address generators 106, 107, to constitute N sets of time division multiplex echo suppressor. By connecting terminals 5 and 6 and changing the address at transmission side when the folding at the station itself is made, tentative operation can be made as an echo suppressor.
申请公布号 JPS56120238(A) 申请公布日期 1981.09.21
申请号 JP19800023541 申请日期 1980.02.27
申请人 NIPPON ELECTRIC CO 发明人 NAKANO KENICHI
分类号 H04J3/14;H04B3/23;H04J3/24 主分类号 H04J3/14
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