| 摘要 |
<p>PURPOSE:To delay an input pulse variably without almost changing an output pulse width. CONSTITUTION:A variable delay circuit in which an emitter follower comprising a constant current source and a transistor(TR), a capacitive load is connected to the emitter, a comparator is connected to the emitter follower and a reference voltage of the comparator is controlled by a D/A converter is connected in cascade. Thus, a pulse signal of almost the same pulse width as that of an input pulse is outputted independently of a threshold voltage.</p> |
