| 摘要 |
PURPOSE: To make a memory element low power consumption by utilizing a test signal having a short pulse width and latch back MOSFETs to reduce the power consumption of the redundancy circuit in a memory element. CONSTITUTION: In a state in which the fuse of a redundancy operation fuse circuit 47 is cut off and a redundancy circuit is used, input signals (the inversion of ϕEN, ϕEVAL) become high levels. Consequently, since a MOSFET 50 is turned ON and a MOSFET 49 is turned OFF, an output SPARE becoming a redundancy column decoder adjustment signal maintains a low state. Next, when the signal (the inversion of ϕEN) transits to the low state and, next, the test signal ϕEVAL transits to the low state, the FET 49 is turned ON and the FET 50 is turned OFF and a current is made to flow through the output SPARE from a power source. In this case, since unnecessary power consumption is generated only in a section equivalent to the width of the signal ϕEVAL, the power consumption of the circuit is reduced. |
