| 摘要 |
A data generator generates digital data at a sampling time interval DELTA T (sampling frequency fs=1/ DELTA T), and the three latest items of digital data V-1, V0, V+1 are repeatedly latched successively in three latch circuits every 3x DELTA T. A pulse response signal generator outputs unit pulse response signals of period 3x DELTA T at the time interval x DELTA T, and three multiplying-type DA converters multiply these three unit pulse response signals phi 0(t+ DELTA T), phi 0(t), phi 0(t- DELTA T) by the digital data V-1, V0, V+1, respectively, at a speed of axfs (a times in time DELTA T). The outputs of these multiplying-type DA converters are combined into an analog signal SA, which is delivered as an output. |
