发明名称 |
Semiconductor memory device having a sensitivity controllable sense amplifier circuit |
摘要 |
A semiconductor memory device includes a sense amplifier circuit which includes a load circuit. The impedance of the load circuit is adjustable by a bias voltage. The bias voltage is generated by a bias circuit which also controls a bit line initial potential.
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申请公布号 |
US5136545(A) |
申请公布日期 |
1992.08.04 |
申请号 |
US19900619418 |
申请日期 |
1990.11.29 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TAKAYANAGI, TOSHINARI |
分类号 |
G11C11/419;G11C7/06;G11C7/12 |
主分类号 |
G11C11/419 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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