WERKWIJZE VOOR HET VERVAARDIGEN VAN EEN VELDEFFECTTRANSISTOR MET GEISOLEERDE POORT.

摘要

A polycrystalline silicon region 8 is provided under an overhang at the edge of a layer 3. In a first embodiment layer 3 is a polycrystalline silicon gate and region 8 connects the gate to a diffused region 1. In a second embodiment (Figure 3) the overhanging layer is of insulating material and region 8 forms a conductive track or resistor completely surrounded by insulating material. Impurities may be diffused into the region 8 from gate layer 3 and substrate diffused layer 1, by a heat treatment step to produce an ohmic contact between gate layer 3 and substrate diffused layer 1. Other methods of forming the electrical connection are also described.