| 摘要 |
PURPOSE:To perform fast pull-in by reducing the control voltage of a VCO and to generate an output signal with high accuracy by providing an output means by dividing the output of a frequency phase difference detecting means or that of a charge pump. CONSTITUTION:The optimum loop characteristic can be obtained by setting the output current of a variable output charge pump 14 corresponding to the frequency division ratio of a programmable frequency divider 6 when no phase locking is taken, and a satisfactory pull-in operation can be performed. When the phase locking is taken, the correction cycle of a voltage controlled oscillator(VCO) control voltage 11 can be set at M.T0, and the correction quantity of fluctuation of the VCO control voltage 11 per cycle T1 of a reference signal 7 is set so as to coincide with that by a false correction cycle MT0 per cycle T1. Thereby, it is possible to reduce the fluctuation of the VCO control voltage 11 compared with the VCO control voltage 11 of a frequency synthesizer by conventional technique shown in alternate long and short dash line, and a clock signal 12 with high accuracy can be generated. |
