发明名称 AUTOMATIC RESENDING SYSTEM OF DATA TRANSMISSION
摘要 PURPOSE:To obtain a throughput characteristic close to an ideal value by a small- capacity buffer memory by inputting only a new data block received correctly and a resent data block received correctly for the first to the buffer memory. CONSTITUTION:Between time t0 and time t1, data block D3 is the 1st error block, so the resending on the SR system is done once and blocks D5 and D8 regarded as NACK (negative response) are resent by a normal SR system. If ACK (affirmative response) of block D3 is not found up to time t1, block D3 is transmitted continuously from time t1 when NACK is received for the second to time t2 when ACK is received, and at the point in time when NACK of block D10 is received, block D10 is resent. After ACK of block D3 is received, new data blocks, such as blocks D14 and D15, are transmitted successively. At a reception side, only the block regarded as ACK for the first among many resent data blocks D3 is inputted to a buffer memory and up to the point in time, none of data blocks D4-D13 having already been inputted is outputted.
申请公布号 JPS56123150(A) 申请公布日期 1981.09.28
申请号 JP19800027137 申请日期 1980.03.04
申请人 KOKUSAI DENSHIN DENWA CO LTD 发明人 TAKAHASHI TOSHIO;YASUNAGA MASAYUKI
分类号 H04L1/16;H04L1/18;(IPC1-7):04L1/18 主分类号 H04L1/16
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