发明名称 Method of accelerated testing of reliability of an IC comprising microprogram control system.
摘要 <p>A method of acceleration testing of reliability of an LSI adopting a microprogram is realized simply. In a test mode, a microaddress is progressively incremented "1" by "1" and data processing within the LSI is executed in accordance with a microcode read out from a control memory based on the microaddress. As for a command decoder and an address generator, external data terminals are clamped to a voltage source or to a ground to permit a specific command to be fetched by the LSI under test. In this way, a majority of internal gates within the LSI are activated while the acceleration test is being conducted on the LSI. &lt;IMAGE&gt;</p>
申请公布号 EP0496403(A1) 申请公布日期 1992.07.29
申请号 EP19920101095 申请日期 1992.01.23
申请人 NEC CORPORATION 发明人 HARIGAI, HISAO C/O NEC CORPORATION
分类号 G06F11/22;G01R31/28;G06F11/24;G06F11/27 主分类号 G06F11/22
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