Highly stable semiconductor memory with a small memory cell area

摘要

In order to obtain a highly stable SRAM cell having a small cell area, a cell ratio R is set to be R=(WDEFF/LDEFF)/(WTEFF/LTEFF)<3 where LDEFF and WDEFF denote an effective channel length and an effective channel width of two driver MOSFETs 3 and 4 respectively, and LTEFF and WTEFF denote an effective channel length and an effective channel width of two transfer MOSFETs 5 and 6 respectively. Further, a maximum current IR flowing into the active loads MOSFETs 1 and 2 is set to be greater than a current IL (1x10-8 A) that flows into the driver MOSFET 5 when a threshold voltage is applied across the gate and the cource of the MOSFET 5. The pair of active load MOSFETs 1 and 2 are stacked on the driver MOSFETs 3 and 4 and on the transfer MOSFETs 5 and 6.