| 摘要 |
PURPOSE:To make one precharge circuit and one decoder circuit sufficient in a semiconductor storage device and, in addition, the layout shapes of a bit line pair the same by respectively providing switches at the central parts and both end sections of the bit line pair extended between paired sense amplifiers. CONSTITUTION:Bit line pairs BL and the inverse of BL are provided for connecting sense amplifiers SA1 and SA2 and transistors T14 and T11, T15 and T12, and T16 and T13 are respectively provided as switches at the central parts and right and left end sections of the each bit line BL and the inverse of BL. Then, by simultaneously turning on the switches T14, T11, T15, T12, T16, and T13 during a precharging period, the bit line pairs BL and the inverse of BL are precharged by means of a precharge circuit PV provided on either one side of the bit line pair BL and the inverse BL. Therefore, no other precharge circuit is required other than the precharge circuit PV and, since the numbers of switches provided on both sides of the bit line pair become the same, the layout shapes of the bit line pair BL and the inverse BL become the same. |
