| 摘要 |
PURPOSE:To shorten a transition time and to attain a speed increase of an access time by providing two transistors having different driving ability to charge the gates of the output driver transistors, and delaying the gate inputs of both transistors by a specified time. CONSTITUTION:The charging transistors Q7, Q8 having different driving ability to charge the crates of Q5, Q6 are provided in inverter circuits driving the driver transistors Q5,Q6, and the gate inputs of Q7, Q8 are controlled by inputting sub-control signals phi1a, phi2a having the specified time difference with control signals phi1, phi2 inputted to each inverter. By this procedure, gate potentials of the Q5, Q6 are slowly raised from the 'L', and the gates of Q5, Q6 are charged by receiving the phi1a, phi2a after the specified time, then the gate potentials rapidly become 'H'. Consequently, the transition time becomes not so much affected by the amount of a load capacity C, then the access time is improved and a noise is no longer generated. |
