发明名称 INTEGRIERTER SCHALTKREIS MIT VERARBEITUNG IM SPEICHER
摘要 <p>A process in memory chip has been designed to combine memory and computation on the same integrated circuit in a way that makes use of the bandwidth that results from the combination. The chip contains multiple single-bit computational processors that are all driven in parallel. Error correction logic is also incorporated into the chip to detect and correct errors in memory, data as they occur.</p>
申请公布号 DE4134192(A1) 申请公布日期 1992.07.23
申请号 DE19914134192 申请日期 1991.10.16
申请人 IOBST, KENNETH W., SILVER SPRING, MD., US;RESNICK, DAVID R., EAU CLAIRE, WIS., US;WALLGREN, KENNETH W., COLUMBIA, MD., US 发明人 IOBST, KENNETH W., SILVER SPRING, MD., US;RESNICK, DAVID R., EAU CLAIRE, WIS., US;WALLGREN, KENNETH W., COLUMBIA, MD., US
分类号 G06F7/50;G06F7/509;G06F7/575;G06F11/10;G06F12/00;G06F12/06;G06F12/16;G06F15/78;G06F15/80;G06F17/16;G11C29/00;G11C29/42 主分类号 G06F7/50
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