| 摘要 |
<p>Apparatus and method for counting frequency of a signal with improved resolution. Frequency counters (10, 60, and 100) accumulated clock cycles from a reference oscillator (20) during a sample interval. In the simplest form of the frequency counter, the reference clock signal is inverted and both the noninverted and inverted clock cycles are accumulated in separate counters (40 and 44). The accumulated counts are totaled in a summing circuit (48) and divided by two to determine their average, thereby doubling the resolution of the frequency counter. A more complex embodiment of the invention corrects a raw count of cycles of an input signal (12) that are accumulated during an extended sample interval defined by successive rising edges of a sample signal (114). The fractional portion of a cycle of the input waveform that occurred prior to the beginning of the extended sample interval is added to the raw count and the fractional portion of the input waveform that occurred after the end of the extended sample interval is subtracted. These fractional portions are defined as ratios of a partial count of clock cycles to a full count of clock cycles. The partial count is the number of clock cycles occurring between a rising edge of the sample signal and the next rising edge of the input signal, while the full count is the number of clock cycles occurring between successive rising edges of the input signal. One-half clock logic circuits (126 and 136) double the resolution of the counts accumulated by a partial counter (122) and a full counter (142), thereby doubling the resolution with which the ratios of the two counts are determined.</p> |
