发明名称 Optimization of BV and RDS-on by graded doping in LDD and other high voltage ICs
摘要 Transistor structure using a lightly doped drain (LDD) technique are disclosed. The present invention provides a reduced on-resistance in the LDD region, while retaining substantially all the high breakdown voltage advantage of the LDD technique. The advantage of the present invention is achieved by applying a non-uniform impurity design in the LDD region, increasing gradually from the gate-edge towards the contact.
申请公布号 US5132753(A) 申请公布日期 1992.07.21
申请号 US19900498170 申请日期 1990.03.23
申请人 SILICONIX INCORPORATED 发明人 CHANG, MIKE F.;OWYANG, KING
分类号 H01L21/336;H01L21/266;H01L29/78 主分类号 H01L21/336
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