发明名称 Semiconductor memory device having flip-flop circuits
摘要 A semiconductor static random access memory having a high alpha -ray immunity and a high packing density is provided which is also capable of high-speed operation. A semiconductor memory device comprises static random access memory cells each including a flip-flop circuit. Storage nodes of each flip-flop circuit have respective pn-junctions formed at regions sandwiched between gate electrodes of first insulated gate field effect transistors and gate electrodes of second insulated gate field effect transistors, respectively. The pn-junction has an area smaller than that of a channel portion of the first or second insulated gate field effect transistor. The gate electrode of one of the two first insulated gate field effect transistors and the drain region of the other insulated gate field effect transistor, on one hand, and the drain region of the one insulated gate field effect transistor and the gate electrode of the other insulated gate field effect transistor, on the other hand, are electrically cross-coupled mutually through first and second electrically conductive films, respectively. Also, to increase packing density and enhance immunity to soft error, the gate electrodes of the first and second insulated gate field effect transistors extend substantially in parallel with one another and the channel regions of the first and second insulated gate field effect transistors extend substantially in parallel with one another.
申请公布号 US5132771(A) 申请公布日期 1992.07.21
申请号 US19900503928 申请日期 1990.04.04
申请人 HITACHI, LTD.;HITACHI VLSI ENGINEERING CORPORATION 发明人 YAMANAKA, TOSHIAKI;HASHIMOTO, NAOTAKA;HASHIMOTO, TAKASHI;SHIMIZU, AKIHIRO;ISHIBASHI, KOICHIRO;SASAKI, KATSURO;SHIMOHIGASHI, KATSUHIRO;TAKEDA, EIJI;SAKAI, YOSHIO;NISHIDA, TAKASHI;MINATO, OSAMU;MASUHARA, TOSHIAKI;HANAMURA, SHOJI;HONJO, SHIGERU;MORIWAKI, NOBUYUKI
分类号 G11C11/412;H01L27/11 主分类号 G11C11/412
代理机构 代理人
主权项
地址