| 摘要 |
<p>PURPOSE:To generate a control data without giving a limit to data processing capacity by generating a data generating timing of a data generating circuit asynchronously with an output timing of a timing generating circuit. CONSTITUTION:A data generating circuit 1 receives device state information 10 to monitor a state of an external device and sends a control data 15 corresponding to the state to a data transfer control circuit 3 and sends a data transmission end signal 11 to a timing generating circuit 2 at the end of output. The timing generating circuit 2 is set by the data transmission end signal 19 and sends a data transfer enable signal 13 to a data transfer control circuit 3 and a write address counter 5. A storage circuit 6 writes the control data 15 to an address commanded by a write address signal 16 and reads a content of the address pointed out by a read address signal 17 sent from the read address counter 5 and outputs the result as an output data 18.</p> |
