| 摘要 |
<p>PURPOSE:To prevent a clock which performs transfer control from deteriorating and to prevent malfunction by providing both a delay circuit and a clock generating circuit or only the delay circuit for each data processing block, and providing a clock generating means for an optional data processing block. CONSTITUTION:When a trigger is inputted to a clock generating circuit 30 first, a clock phi0 is generated. Then clocks phi1, phi2, phi3... which perform transfer control are generated through delay circuits 41-43 and clock generating circuits 31-33 and passed through a storage element 2 which perform transfer control to perform data transfer. The delay circuits 41-43 are provided corresponding to data processing blocks A-C respectively and a delay quantity of each delay circuit is set larger than the processing time of a data processing block. Consequently, the clocks which perform the transfer control are prevented from deteriorating and surely obtained without being affected by the transfer speeds and the number of transfer stages, so that the data transfer device which does not malfunction is obtained.</p> |
