发明名称 DIRECT MEMORY ACCESS TRANSFER CONTROLLER
摘要 <p>PURPOSE:To increase the DMA(direct memory access) transfer speed of data and to improve the use efficiency of a memory by providing registers which designate the memory address and the frequency in transfer of each block and performing DMA transfer based on them. CONSTITUTION:The start memory address of a memory for DMA transfer is designated by a memory address designating register 1, and the extent of increase/decrease of the memory address for continuous data transfer of one block from this start memory address is designated by a first increase/decrease extent designating register 2, and the frequency in transfer is designated by a first transfer frequency designating register 3. The extent of increase/decrease of the memory address and the frequency in transfer of each block are designated by a second increase/decrease extent designating register 4 and a second transfer frequency designating register 5, and this address setting control is performed by an address register setting control circuit 6. Thus, it is unnecessary to set the address to a memory 12 by a processor 13 and to refer to the area of the memory 12 by a DMA transfer controller 100, and data is transferred at a high speed, a the memory 12 is effectively used.</p>
申请公布号 JPH04195449(A) 申请公布日期 1992.07.15
申请号 JP19900323316 申请日期 1990.11.28
申请人 OKI ELECTRIC IND CO LTD 发明人 HORI TATSUHIKO
分类号 G06F13/28;G06F15/78 主分类号 G06F13/28
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