| 摘要 |
<p>The Delta-Sigma modulator for digitally encoding an analogue input signal includes a clock (303) for generating a timing waveform having a frequency higher than the highest frequency component of an analogue input signal. A sampling circuit (1,3,C1), including a switching capacitance, stores charge representative of instantaneous amplitude values of the input signal. An integrator (4,C), operative as a low-pass filter, is responsive to the output of the sampling circuit. A one-bit A to D converter (19,20), clocked by the timing waveform, provides two complementary outputs (Q,Q) in response to the instantaneous polarity of the integrator output. A reference circuit (301) selectively applies a charging voltage to the integrator. This arrangement is for use in a telephone voice channel and its performance does not depend on the absolute values of capacitors and resistors.</p> |
