MARCHING INTERCONNECTING LINES IN SEMICONDUCTOR INTEGRATED CIRCUITS

摘要

MARCHING INTERCONNECTING LINES IN SEMICONDUCTOR INTEGRATED CIRCUITS In order to reduce parasitic capacitive cross-coupling in an integrated circuit, metallization lines in an array--for example, an array of word lines, of bit lines, or of bus interconnects-are geometrically arranged in a systematically progressive marching sequence, whereby the identity of the lines located on either side of a given line keeps changing.