| 摘要 |
<p>PURPOSE:To decrease the switching noises at the time of verification by providing the 1st series circuit of P-N-FETs and the 2nd series circuit of P-FETs between a power source and the ground and activating the 2nd series circuit at the time of program verification. CONSTITUTION:The 1st series circuit of the P-FET 1 and the N-FET 3 and the series circuit of the N-FETs 2, 4 are provided between the power source Vcc and the ground of a power source voltage detecting circuit in the output buffer circuit of an EPROM and the FET 2 is controlled via an inverter 9. Only the 1st series circuit is activated and the voltage Vcc or the ground voltage is detected and outputted by the activation of either of the FETs 1, 3 at the time of the ordinary voltage Vcc. On the other hand, only the 2nd series circuit is activated at the time of the program verification of the high voltage Vcc and similarly the voltage detection is executed. The 2nd series circuit is made into the N-FET-W-FET constitution, by which the switching noises of the output buffer circuit at the time of the program verification are decreased and the program operation is stably executed.</p> |
