| 摘要 |
Contacts (a-e) of connectors (72,73), (74,75), (76,77), (87,79) , (80,81) and (82,83) of input/output cards (A-F) are divided into two groups (a,b) and (c,d,e), so that one of the groups should show an odd number. The contacts (a,b), (b,a), (c,e), (d,c) and (e,d) are connected to signal lines, while the connectors (72),(74), (76),(78),(80) and (82) are connected through their contacts (a,c) to OR gates (OR1-OR6). Low potential chip selecting signals (CS) are made to be outputted from one of the OR gates (OR1-OR6) of the input/output cards (A-F) by the addresses of a central processing section (1), thereby selecting an internal circuit.
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