| 摘要 |
A novel device structure of a one-transistor one-capacitor type RAM capable of high speed accessing for high element density. Unit memory cells, each being a regular hexagon in its planar shape, are provided on a substrate in a high density. Each unit cell has a bit diffusion region at the center of the regular hexagon on the surface of the substrate, the transistor on the side face of a "shallow groove" formed in the substrate along the outer periphery of the regular hexagon, a capacitor on the side face of a "deep groove", which is formed in the bottom of the "shallow groove" and which is narrower than the "shallow groove", and an intercellular insulation region in or near the bottom of the "deep groove", all being formed continuously. |
