| 摘要 |
<p>PURPOSE:To stabilize the access time by installing a first transistor and a second transistor which have been connected to a first common data line and a second common data line. CONSTITUTION:The following are installed: a MIS transistor 12, for current bypass use, where a first common data line DB1 is connected to its gate, a second common data line DB2 is connected to its drain and its source is connected to a power supply; and a MIS transistor 11, for current bypass use, where the second common data line DB2 is connected to its gate, the first common data line DB1 is connected to its drain and its source is connected to the power supply. In this case, when a sense amplifier circuit 20 is going to read out a data on a data line BL1, the common data line DB1 is set to a prescribed potential. At this time, the N-channel MIS transistor 12 for current bypass use is set to an ON state, and a residual electric charge on the common data line DB2 in a non-selective state is made to escape. Thereby, the access time can be stabilized and a high speed is realized.</p> |
