发明名称 HALBLEITER-UMSCHMELZVERFAHREN
摘要 A method of reflowing a semiconductor device to increase the planarization thereof includes the steps of first forming a first insulating layer over a silicon semiconductor substrate, forming at least one electrode over the first insulating layer, and then forming a second insulating layer over the at least one electrode and the first insulating layer. A first borophospho silicate glass (BPSG) layer of low concentration is then formed over the resultant surface to a thickness of 6000 to 9000 ANGSTROM and containing 3-4 wt. % boron and 5-7 wt. % phosphorous. A second borophospho silicate glass (BPSG) layer of high concentration is formed over the resultant surface of the first borophospho silicate glass (BPSG) layer to a thickness of 2000 to 6000 ANGSTROM and containing 4-7 wt. % boron and 8-10 wt. % phosphorous. This resultant structure is then exposed to a reflowing process so as to flatten the respective surfaces of the first and second borophospho silicate glass (BPSG) layers to form a planarized resultant structure which is then etched. The use of two different concentrations of BPSG films permits lowering baking temperatures during the reflow process by as much as 50 DEG C. while preventing the corrosive forming properties of the resultant reflowed BPSG film.
申请公布号 DE4133625(A1) 申请公布日期 1992.07.02
申请号 DE19914133625 申请日期 1991.10.10
申请人 SAMSUNG ELECTRONICS CO., LTD., SUWON, KR 发明人 LEE, SUNG-MIN;JUNG, YOO-SUCK, SEOUL/SOUL, KR
分类号 H01L21/3205;H01L21/3105;H01L21/311;H01L21/316;H01L21/768;H01L23/532 主分类号 H01L21/3205
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