| 摘要 |
The method comprises forming a groove-shaped step on a gate region, depositing gate conduction and oxide films (4,8) on the gate region having the step to evenly coat photosensitive film (11) thereon, etching the flattened photosensitive and oxide films (11,8) with the same etch selectivity to leave the oxide film (8) only on the lower of the groove and anisotropically etching the gate conduction film (4) by using the oxide film (8) as a mask, thereby forming a gate electrode (4') with fine line width. The method obtains a uniform line width of gate and a vertical side wall of gate electrode to minimize parasitic capacitance.
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