Fast capacitive-load driving circuit for integrated circuits particularly memories.

摘要

A fast capacitive - load driving circuit for driving output nodes on an integrated circuit. This circuit reduces noise interference caused by parasitic inductance by lowering the inductance voltage on the power supply lines during the switching process. This invention includes a voltage ramp, a voltage-to-current converter, and an output buffer having at least one pull-down transistor. A further embodiment includes an output buffer possessing a pull-down and a pull-up transistor. <IMAGE>