发明名称 DATA ERASABLE ROM
摘要 <p>PURPOSE:To avoid erroneous writing or another data again by an operation error, etc., by setting the content indicating writing inhibition in a writing inhibition state memory circuit. CONSTITUTION:A writing inhibition control circuit 2 outputs a writing inhibition control signal to a writing inhibition circuit 3 in accordance with the information stored in the writing inhibition state memory circuit 1. The writing inhibition circuit 3 disconnects a voltage line 10 for writing from a chip control circuit 4 to prevent the arrival of a voltage for writing at a memory cell 7 by the control signal from the writing inhibition control circuit 2. The information on the writing inhibition of the writing inhibition state memory circuit 1 is erased together with the data stored in the memory cell 7 and a write enable state is attained when the ROM is irradiated with UV rays in the case of execution of rewriting. The writing of the data in this state is then possible. The erroneous writing of another data again is averted when the writing is executed once.</p>
申请公布号 JPH04182996(A) 申请公布日期 1992.06.30
申请号 JP19900313404 申请日期 1990.11.19
申请人 TOSHIBA CORP 发明人 TSUCHIYA HIDENORI
分类号 G11C17/00;G06F12/14;G06F21/02;G06F21/24;G11C16/02;G11C16/06 主分类号 G11C17/00
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