| 摘要 |
PURPOSE:To handle abnormality occurrence immediately and to minimize and suppress damage by latching the signal state on a bus at the point of time of the abnormality occurrence and specifying the processor where the abnormality occurs and the kind of the abnormality by other processors according to the signal state. CONSTITUTION:While each processor accesses other processors normally, this bus monitor device updates the signal state of the bus 4 latched in a common bus latch circuit 7 every time access is started. If abnormality occurs on the bus 4, the signal state in the abnormality occurrence which is latched in the circuit 7 is not updated. Therefore, each processor 5 which receives error occurrence information from the bus monitor device 6 reads the signal state in abnormality occurrence which is latched in the circuit 7 to judge the processor where the abnormality occurs and the kind of the abnormality. Therefore, a countermeasure corresponding to the abnormality occurrence is speedily taken and the damage of the system in case of the abnormality occurrence suppressed to a minimum. |
