发明名称 COMPUTER BUS HAVING PAGE MODE MEMORY ACCESS
摘要 Method and apparatus are disclosed for use in a digital computer system having a system bus for interconnecting together various agents. A page mode type of memory access provides for the rapid transmission of a block of data across the bus. Blocked refresh means is also employed which disables, if possible, the burst refresh of the memory until a data transfer is completed. A local processor upon an agent having a memory controlled in such manner is provided a high priority signal line for overriding a current bus transfer for gaining access to the memory. During such a high priority access the blocked refresh means operates in a manner somewhat similar to its operation during the sequential bus transfer, however fewer rows are refreshed during the burst refresh.
申请公布号 CA1304523(C) 申请公布日期 1992.06.30
申请号 CA19880577633 申请日期 1988.09.16
申请人 WANG LABORATORIES, INC. 发明人 LAGOY, BRIAN E.J., JR.
分类号 G06F13/16;G06F12/02;G11C7/10;G11C8/12;G11C11/406 主分类号 G06F13/16
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