| 摘要 |
NARROW RANGE DIGITAL CLOCK CIRCUIT The invention provides a digital clock circuit for providing an output clock signal having a frequency varying between predetermined limits. A digital frequency changer circuit is responsive to a fixed frequency signal and to control signals for generating the output clock signal. A circuit means is responsive to a variable reference signal and to the output signal of the clock circuit for generating a binary control word representative of a frequency difference therebetween. A rate multiplier circuit is responsive to the binary control word and the output clock signal for generating the control signals. The only nondigital component of the clock circuit is a local crystal oscillator. |
