发明名称 Sense amplifier for a memory device
摘要 A MOS transistor sense amplifier employs cross coupled positive feedback for the load circuit of a differential amplifier with an equalizing switch at the amplifier output, and preferably also at the input. This basis amplifier circuit may be repeated in stages. When stages are employed, it is desirable that the first stage employs current mirror loading of the differential amplifier to reduce the data delay. Data delay is further reduced by providing strong amplification during the sense portion of the read cycle with a preamplifier, which preamplifier has its amplification reduced, preferably to unity by being turned off, when the sense portion of the cycle is finished, and most preferably when the input and output data lines are directly connected independently of the preamplifier, so that the preamplifier may be completely turned off to lower power consumption.
申请公布号 US5126974(A) 申请公布日期 1992.06.30
申请号 US19900465040 申请日期 1990.01.16
申请人 HITACHI, LTD. 发明人 SASAKI, KATSURO;SHIMOHIGASHI, KATSUHIRO;ISHIBASHI, KOICHIRO;HANAMURA, SHOJI
分类号 G11C7/06;G11C11/419 主分类号 G11C7/06
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