发明名称 PULSE CORRECTION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To make the operation of an LSI stable and to improve the reliability of a data processing unit by using a pulse signal such as a reset signal and a write/read control signal as a trigger signal to apply secondary processing to the pulse signal and ensuring a prescribed pulse width of the pulse signal subject to secondary processing. CONSTITUTION:A 1st noninverting intermediate signal D1 is outputted to a 1st signal output means 13A by a 1st signal generating means 11A based on, e.g. a pulse signal PS and a reference clock CLK. Moreover, a 1st inverting intermediate signal -D1 is outputted to a 1st signal processing means 13A. Thus, when a pulse signal PS such as a control pulse and an instruction pulse is sent from a transmission point to a reception point, the pulse PS is used as a trigger signal to start the operation of the signal generating means 11A. Then the pulse signal PB1 synchronously with the leading or trailing of the CLK and having a prescribed pulse width PHIi surely is outputted. Thus, the operation of an LS 1 of an input circuit or the like to be transited to other signal processing based on the pulse signal is made stable.</p>
申请公布号 JPH04181806(A) 申请公布日期 1992.06.29
申请号 JP19900310221 申请日期 1990.11.16
申请人 FUJITSU LTD;KIYUUSHIYUU FUJITSUU EREKUTORONIKUSU:KK 发明人 NAGATA KIMIHIKO;YAGASHIRA SHOICHI
分类号 G11C11/413;G06F1/24;G11C11/401;H03K5/04 主分类号 G11C11/413
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