| 摘要 |
Digital data provided in the form of a serial signal is fetched into an N-bit shift register and parallel N-bit data output therefrom is provided as address data to address input terminals of a memory. In the memory there are prestored at respective addresses defined by the N-bit data the total sum value of multiplied outputs obtained by multiplying the address values and the bit data of a coefficient h(n-i) defining an impulse response characteristic. The N-bit data is provided to an address input terminal of the memory to read out therefrom a digital value corresponding to the output voltage of a digital filter. The digital value is D/A converted to obtain the output voltage of the digital filter.
|
