| 摘要 |
The circuit includes a PLL (phase locked loop control) phase detecting section (2) for comparing the revolution speed with the phase of a DC motor (8) to output analogue speed control signals and phase control signals. A T flip-flop (TF) latches the lock detecting signals of the PLL phase detecting section (2), and controls a second transistor (TR2) to drive the DC motor (8). The second driving transistor (TR2) supplies a voltage to the DC motor (8), when the output of the T flip-flop (TF) has a high level. A first transistor (TR1) also supplies a voltage to the DC motor alternately with the second transistor (TR2), thereby driving the DC motor (8). With the circuit, the capacities of the transistors are decreased, thereby improving the economy of the motor.
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